HVDC Transmission System Schematic Diagram Overview and Key Components

schematic diagram of hvdc transmission system

Select a bidirectional thyristor-based converter for high-voltage applications above 1,000 MW, particularly in point-to-point grid connections spanning 600 km or more. These converters handle reactive power demands up to 60% of active power, reducing switching losses by 30% compared to IGBT alternatives. Pair the converter with oil-immersed smoothing reactors rated for 0.5 H to 1.0 H to suppress harmonic distortions below 2% THD under full load.

Use ACSR conductors with a cross-section of 1,200 mm² for overhead lines, ensuring current density stays under 1 A/mm². This prevents conductor sag exceeding 10 meters per 500-meter span at 40°C ambient temperature. Ground electrodes must sink at least 50 A/km² into low-resistivity soil (below 100 Ω·m) to avoid step potentials above 15 V/m near injection points.

Integrate a bipolar configuration with metallic return to isolate fault currents under 5 kA for up to 150 ms. DC breakers should trip within 20 ms using pre-charged capacitors to counteract arc suppression delays. For cable-based routes, choose XLPE insulation rated for 1.2 U₀ continuous operation, with surveillance thresholds set at 1.5 U₀ for partial discharge detection.

Deploy shunt reactors on the AC side to maintain voltage stability within ±5% during transient events. A 400 MVAr reactor at each terminal compensates for load rejection swells up to 1.3 pu. Combine this with series capacitors rated for 70% line reactance to enhance power transfer by 40% over uncompensated AC counterparts.

Configuring master control in constant power mode rather than constant voltage reduces tap changer operations by 60%. Set DC voltage references between 0.95–1.05 pu for optimal converter efficiency–a 1% deviation increases losses by 200 kW per terminal. Include redundant fiber-optic communication lines with latency under 30 ms for real-time power modulation.

Visual Blueprint of High-Voltage Direct Current Energy Networks

Begin by segmenting the layout into three core zones: the converting stations at both ends, the overhead or underground conductor pathways, and the grounding electrodes. The rectifier terminal typically employs a 12- or 24-pulse thyristor bridge configuration, selected for its ability to minimize harmonic distortion below 1% THD when paired with AC filters tuned to the 11th and 13th harmonics. Ensure the smoothing reactor at the DC side has an inductance between 0.25–0.5 H to suppress current ripples below 3% of nominal load, critical for stable operation under dynamic grid conditions.

Ground return should utilize dedicated metallic electrodes buried in low-resistivity soil (

Key Components and Their Configuration

Inverter stations demand active power control loops incorporating voltage-dependent current order limits (VDCOL) to prevent commutation failures during AC-side voltage dips. The control system must integrate a 400–600 ms response time for primary frequency control, achieved via PI regulators with anti-windup protection. DC breakers should use hybrid designs combining mechanical switches and solid-state IGBTs, capable of interrupting fault currents up to 15 kA within 5 ms. Cooling systems for thyristor valves must maintain junction temperatures below 90°C, using deionized water loops with a resistivity ≥5 MΩ·cm and a flow rate ≥3,000 L/min for 3 GW installations.

Surge arresters must be positioned at both line terminals and the midpoint of long-distance overhead routes, rated for a temporary overvoltage withstand of 1.4 p.u. for 10 seconds. Telecommunication links between terminals should prioritize fiber-optic channels with a bit error rate -9, using redundant paths to avoid latency exceeding 50 ms for remote fault detection. For bipolar configurations, maintain a neutral bus grounded through high-speed disconnectors to facilitate rapid pole reconnection after monopolar faults, ensuring a recovery time

Testing protocols require staged load rejections at 20%, 50%, and 100% of rated capacity to validate dynamic performance, with oscillographic records analyzed for overshoot (

Critical Elements of a High-Voltage Direct Current Link

schematic diagram of hvdc transmission system

Begin by selecting converters capable of handling a minimum of 1,500 MW per station with a voltage rating between ±500 kV and ±800 kV, depending on the route length. Thyristor-based line-commutated converters (LCCs) remain the standard for bulk power transfer over 800 km, while voltage-source converters (VSCs) using insulated-gate bipolar transistors (IGBTs) are optimal for shorter links or grids requiring black-start capability. Prioritize converter stations with dual redundant cooling–preferably deionized water for thyristors and forced-air for IGBTs–to prevent overheating during fault conditions.

Ground electrodes must be positioned at least 10 km from the station to avoid metallic corrosion in buried infrastructure. For land-based projects, use horizontal graphite electrodes buried 2–3 meters deep in coke beds; for submarine cables, allocate dedicated return electrodes spaced 50 meters from the cable route to minimize stray current interference. Electrodes must be sized to handle continuous currents of up to 3 kA with transient surges of 6 kA for 5 seconds–failure to meet this results in accelerated degradation.

Cable selection demands a three-layer cross-linked polyethylene (XLPE) insulation for DC voltages above 320 kV, with a minimum conductor cross-section of 2,500 mm² for copper or 3,000 mm² for aluminum. Submarine routes longer than 100 km require mass-impregnated non-draining (MIND) paper insulation, while extruded cables work only for distances under 300 km due to space charge accumulation. All joints must incorporate metallic sheaths with longitudinal water blocking to prevent moisture ingress, especially at transition points between land and subsea segments.

Smoothing reactors must be designed with an inductance between 0.2 H and 0.5 H to suppress harmonic currents above 12th order, with core materials optimized for low losses at 50–60 Hz. Reactors should be placed on both poles and connected in series with converters–omitting this leads to commutation failures during voltage dips exceeding 20%. For bipolar configurations, reactors must be anchored to reinforced concrete bases to withstand electromagnetic forces during pole-to-ground faults.

Surge arresters require a protective margin of at least 20% above the maximum continuous operating voltage (MCOV). Use metal-oxide varistors with a steep front-of-wave response (under 0.5 µs) and coordinated with the converter’s valve arrester. Station-class arresters should be installed at cable terminations, converter valves, and reactor terminals, while line arresters are mandatory every 20 km for overhead sections to mitigate switching overvoltages exceeding 2.5 p.u.

DC filters must target harmonic orders 2, 6, 12, and 24, with passive components sized for a quality factor (Q) between 30 and 50. Active filters are recommended only for weak AC grids where voltage distortion exceeds 1%. Overhead lines should use bundled conductors–four sub-conductors per pole for current ratings above 3 kA–to reduce corona losses and audible noise below 50 dB(A). Tower grounding must achieve a resistance under 10 Ω to prevent backflashovers during lightning strikes.

Control hardware must include duplicate fully redundant processors with a maximum latency of 1 ms for trip signals. Implement a multi-level logic: first-level for current control (response time

Step-by-Step Assembly of Converter Station Circuitry in Visual Layouts

Begin with isolating the AC filtering stage by arranging passive components closest to the grid interface. Use a 3-phase shunt reactor bank rated for 1.2× nominal line voltage, paired with capacitor banks tuned to the 11th and 13th harmonics. Position these elements within 15 meters of the incoming AC busbar to minimize impedance mismatch. Verify phase alignment with a vector analyzer before securing connections–misalignment beyond ±2° introduces reactive power losses up to 4%.

Next, integrate the rectifier bridge using thyristor modules with a blocking voltage of 8 kV and a forward current rating of 3 kA. Mount each module on liquid-cooled heat sinks with thermal paste (conductivity ≥3 W/m·K) to prevent junction temperatures from exceeding 125°C under full load. Connect the DC terminals to smoothing reactors; use air-core coils for currents below 2.5 kA and iron-core for higher ratings to avoid saturation. For layout precision, maintain clearance of 50 cm between adjacent thyristor stacks to comply with IEC 61954.

Control Circuit Integration

schematic diagram of hvdc transmission system

Install firing angle controllers adjacent to each converter arm, using fiber-optic links for gate pulses to avoid EMI. The control board should include a DSP with a sampling rate of at least 40 kHz to ensure synchronization within ±1 μs. Route feedback signals from hall-effect sensors (accuracy ±0.5%) to the controller via shielded twisted pairs, grounding shields at a single point to prevent loop currents.

For DC link assembly, connect the smoothing reactors to the converter’s neutral bus using busbars with a cross-section of 250 mm² per kA of rated current. Apply a layer of silicone-based insulation (dielectric strength ≥30 kV/mm) between busbars and support structures. Install surge arresters (ZnO, 10 kA residual voltage ≤1.6× rated DC voltage) at both ends of the link to clamp overvoltages–spacing should not exceed 10 meters to ensure uniform protection. Test insulation resistance with a 5 kV megohmmeter; values below 100 MΩ indicate contamination or moisture ingress.

Component Specification Critical Tolerance
Shunt reactor 750 MVA, 400 kV ±1.5% inductance
Thyristor module 8 kV blocking, 3 kA ±0.2° firing angle
DC busbar 250 mm²/kA ±0.8 mm alignment
Surge arrester ZnO, 10 kA ≤1.6× rated DC voltage

Conclude by terminating the DC output with a metallic return conductor (MRC) or ground electrode, depending on monopolar or bipolar configuration. For grounded electrodes, use high-silicon iron anodes buried at a depth of 3 meters, spaced at 50-meter intervals to achieve a resistance-to-earth below 0.1 Ω. Seal all cable entry points with epoxy resin (curing time 24 hours) to prevent moisture migration. Prior to energization, perform a step-voltage test: apply 1.1× rated DC voltage for 10 minutes while monitoring leakage current–values above 5 mA signal partial discharges requiring isolation.