If you’re working on the AL00 variant of this budget device, begin by securing its circuit layout from verified sources like official service documentation or trusted third-party providers. Avoid generic board views–target the revised 2016 edition of the manual, as earlier versions omit critical revisions in the power distribution network.
Focus on the PMIC section first. The diagram highlights a MMPF0100 power management IC with seven buck converters; cross-reference this with the NXP datasheet to confirm voltage rails (1.8V for logic, 3.3V for peripherals). A common failure point is the BUCK4 output–test for 3.3V at capacitor C1201 before proceeding. If absent, check inductor L801 for continuity.
The baseband processor connects via a 24-pin flex cable (J501); trace its path to the SIM card slot. Misalignment here often causes No SIM errors. Use a multimeter to verify resistance between J501 pins 1–8 (ground) and the chassis–readings should be less than 0.5Ω. If higher, reflow the connector or replace the cable.
For display issues, isolate the TP2401 touch controller. The blueprint shows dual I2C lines (SCL, SDA) routed to test points TP15 and TP16. Probe these with a logic analyzer while booting; missing 100kHz pulses indicate firmware corruption or IC failure. Flash the latest EMUI 4.1 ROM via QFIL if corruption is suspected.
When soldering components, adhere to J-STD-001 standards. The PCB uses 0.1mm microvias under the eMMC (U402); improper heat application can delaminate layers. Use a hot air station at 320°C with a nozzle reducer to avoid damaging adjacent capacitors.
For radio frequency troubleshooting, refer to the antenna matching network on sheet 3 of the layout. The primary LTE path includes two Pi-networks (L201/C207 and L202/C208); swapping components without recalibration will drift the 700MHz band center frequency. Use a network analyzer to re-tune if signal strength drops below -90dBm.
Y5 II Circuit Reference: Hands-On Repair Techniques
Locate the power IC (PMIC) at coordinates D7 on the board layout–marked as “MT6323GA” in silkscreen–before testing voltage rails. Use a multimeter in DC mode to probe the following pins: 5 (VBAT), 28 (VCORE), 32 (VIO18), and 40 (VMC). Expected readings: 3.8–4.2V (VBAT), 1.1–1.3V (VCORE), 1.7–1.9V (VIO18), 2.8–3.0V (VMC). Deviations below 0.2V indicate a faulty PMIC or shorted decoupling capacitor (check C712–C715 near the IC).
Trace the touchscreen connector (CN501) pins for intermittent display issues:
- Pin 1–2: TP_3V3 (3.3V, verify via R505 0Ω resistor)
- Pin 3: TP_I2C_SCL (should pulse 1.8V during touch)
- Pin 4: TP_I2C_SDA (same as SCL)
- Pin 5: TP_INT (3.3V pull-up, check R507)
Replace flex cable if continuity fails on any line–use an identical part (FT5436GU chipset).
Flash Memory Desoldering Without Damage
Heat the eMMC (KLMAG1JETD-B041) to 220°C with a preheater for 90 seconds before applying hot air at 350°C. Focus the nozzle 1mm above pins 1–16 (VDD) and 153–168 (VCC) simultaneously to avoid thermal shock. Use a stencil for reballing–solder spheres must match 0.4mm pitch. Verify post-reflow with USB jig: Error code 1035 indicates damaged boot1 partition; reflash using SP Flash Tool (DA file: MTK_AllInOne_DA.bin).
Signal path debugging for no-call audio:
- Measure R2402 (10kΩ) between PA (AFEM8033) pin 14 and codec (MT6735M) pin B15. Resistance >12kΩ suggests open circuit–inspect via CN801.
- Probe microphone bias voltage at C2604 (2.2µF). Expected: 1.8–2.1V. If absent, replace microphone or check Q2601 (SS8050).
- Verify I2S lines on codec pins A2–A4 (clock, word select, data) with oscilloscope: 3.3V square wave @ 44.1kHz.
Use fine-tip probes–accidental shorts here will corrupt NVRAM.
Locating Official and Community-Sourced Circuit Board Blueprints for the Y5 II
Start with the manufacturer’s official support channels. Visit the global product page for the device at consumer.huawei.com and navigate to the “Downloads” section. Filter by “Hardware” or “Technical” documents–official service manuals often include PCB layouts, component maps, and signal flow charts. If the direct link omits these files, request them via the live chat or email support; some regions archive engineering documents behind access verification for authorized technicians only.
For verified third-party repositories, target specialized forums and electronics communities. Electro-Tech-Online (electro-tech-online.com) and XDA Developers (forum.xda-developers.com) host dedicated threads where members upload reverse-engineered board files. Use precise search strings like “Y5 II layout file,” “MT6735P boardview,” or “Mediatak service schematic.” Filter posts by date–active contributors typically update ZIP archives with extracted firmware dumps that include Gerber-like layers.
| Source Type | Platform | File Formats | Access Requirements |
|---|---|---|---|
| Official | Brand Portal | PDF, BRD | User registration |
| Tech Forum | Electro-Tech-Online | ZIP, DWG | Forum account |
| Component Seller | AllDataSheet | PDF, PNG | None |
| Chinese Repair Hub | 晶体管收音机 | DZK, BDV | Browser translation |
Explore component distributors like AllDataSheet (alldatasheet.com)–search for individual IC models on the Y5 II’s mainboard (e.g., MT6735P, SKY77353). While these pages rarely provide full system layouts, partial block representations can help reconstruct missing connections. For direct boardviews, Chinese repair sites such as Zoss Repair (zoss.cn) offer downloadable DZK files compatible with tools like OpenBoardView. Use Google Translate for navigation.
If DIY extraction is necessary, purchase a damaged Y5 II unit from eBay or AliExpress. Use a heat gun to remove the EMI shields, then photograph the PCB layers under sufficient lighting. Load images into KiCad or Altium Designer and trace tracks using netlist comparisons against known MT6735P reference designs from Mediatek’s developer portal. Cross-reference pinouts with leaked ODM diagrams from GPG Industries (gpg.com.my)–these often reveal undocumented test points and power rails.
Key Components Identified in the Y5 II Mainboard Blueprint
The central processing unit (CPU) on the Mediatek MT6582 board occupies the upper-left quadrant, directly interfaced with the PMIC (MT6323) via a 0.8mm pitch BGA grid. Trace the power rail from the PMIC’s VCORE output–3.2V nominal–to the CPU’s BGA pads with a multimeter set to continuity mode to verify no cold solder joints, particularly around the inductor cluster marked L401-L404. Pay attention to the thermal via field beneath the CPU; improper grounding here causes intermittent overheating and throttling.
Memory layout splits between the SKHynix H9TP32A8JDMCPR-KGM 2GB LPDDR2 chip and a SanDisk 16GB eMMC (SDIN8DE4-16G). Both components share a 32-bit data bus routed under the CPU. Check resistance between the eMMC’s DAT0 pad and the matching CPU ball–values below 1.2Ω indicate a sound connection, while anything above 2Ω suggests a fractured bond wire or oxidation. Decoupling capacitors (0402, 0.1µF) around the eMMC must be verified; failures here replicate as boot loops or random reboots.
The RF section centers on the MT6166 transceiver, paired with the Avago AFEM-8030 front-end module. The primary antenna feed, a 50Ω micro-coaxial cable, terminates at J501–inspect the impedance with a VNA calibrated to 700-2600 MHz; deviations above 2dB return loss point to damaged flex or faulty matching network. The diversity antenna path uses a Murata DFC1G57U7E296ML dual-band filter; bypass this component temporarily if signal drops happen only on specific bands (e.g., Band 5) to isolate filter failure.
Power delivery starts at the BQ24192 charger IC, converting VBUS to 5V SYSTEM. The inductor L303 (1µH, 1.5A saturation) feeds the MT6323 buck converter–probe both sides of L303 while simulating a 1A load; a differential above 150mV indicates core ESR degradation. The battery connector J301 carries four lines: VBAT, GND, ID, and DATA–clamp a USB-C passthrough dongle between the charger and phone to log charging cycles; erratic current spikes hint at a failing thermistor in the battery pack.
Display interconnects involve a Himax HX8394-A controller, interfaced via a 40-pin FPC labeled CON401. Each of the eight MIPI data lanes should measure 100Ω differential impedance; use a TDR setup with 3ps rise time to identify shorts or open stubs within the FPC. The backlight driver (RT9367) powers a six-LED string at 18V–check the PWM dimming waveform at R501; a 40% duty cycle translates to 120 nits, while anything below 20% suggests a blown LED or driver failure.
Critical Testpoints and Diagnostic Procedures
TP101 outputs the 1.8V LDO from MT6323; if absent, verify the enable pin (GPIO6) on the CPU–logic high here dictates activation. TP202 carries the main clock (26 MHz) from the Rakon RT3319A oscillator; frequency drift beyond ±50 ppm correlates with poor GPS lock. For microphone failure, probe TP303 (analog audio in) during a voice recording–normal amplitude reaches 400 mVpp, while clipped signals pinpoint a dead AK4376 codec or a shorted MEMS capsule.
When USB-C port J101 exhibits intermittent detection, measure capacitance on the CC pin (ID line)–values below 7pF indicate a broken ESD protector (IP4250CX25). The NFC module (PN547) connects via CON701; ensure the 27.12 MHz crystal waveform reads a clean sinusoid at TP701–distortion causes failed tap-to-pay transactions. Replace corroded flux residue around the SIM holder especially if only one IMSI registers; the MT6323’s integrated SIM controller shares traces with the SD card slot, often misdiagnosed as a baseband fault.