Begin by identifying the primary switching transistor–typically an N-channel MOSFET–positioned near the input rectifier bridge. Its gate drives a PWM controller via a small isolating transformer or optocoupler, ensuring galvanic separation between high-voltage and low-voltage sections. Verify the presence of a snubber network (R-C pair) across the drain-source terminals to suppress voltage spikes exceeding 500V during switching transitions, a common failure point in poorly designed units.
Trace the secondary rectification stage where synchronous or Schottky diodes regulate output voltages. Look for dedicated rails: +12V (main load), +5V (legacy peripherals), and +3.3V (modern logic). Each rail should feature LC filters–inductors followed by capacitors with ESR below 30mΩ–to smooth ripple. The +12V rail often includes a current-sharing controller if multiple phases are present, distributing load across parallel MOSFETs to prevent thermal runaway.
Examine the feedback loop originating from the +5V or +3.3V rail. A precision shunt regulator (TL431) compares the output voltage against a reference, adjusting PWM pulses via an optocoupler to maintain regulation within ±2%. Failure here manifests as unstable operation under load, detectable through oscilloscope probes (10µs/div) showing irregular pulse widths. Ensure the standby power section–typically a flyback converter–delivers 5VSB at
Locate critical protection circuits: over-voltage (clamps at +14V/5.5V/3.8V), under-voltage (shutdown below +4.5V), and over-current (hiccup mode or latch-off). The latter monitors MOSFET drain current via a low-ohmage resistor (e.g., 5mΩ), tripping at 120% of nominal load. Fault indicators, if present, route to a supervisor IC (e.g., PS223) that blinks an LED or toggles a PSON# signal to the mainboard.
Inspect the input EMI filter, comprising common-mode chokes and X/Y capacitors to attenuate conducted noise below EN 55032 Class B limits. The PFC stage, when active, boosts the DC link to ~400V using a dedicated controller (e.g., NCP1654) and inductor, improving efficiency to >90% at 230VAC. Passive PFC (voltage doubler) sacrifices efficiency but simplifies circuitry, suited only for low-power units.
Understanding Power Supply Circuit Blueprints
Examine the primary switching stage first–look for a half-bridge or full-bridge MOSFET arrangement paired with a PWM controller like the ON Semiconductor NCP1252 or TI UCC28C42. Verify component placement near the transformer: snubber circuits (typically a 1N4148 diode in series with a 47Ω resistor and 1nF capacitor) should be adjacent to the primary winding to suppress voltage spikes. Check EMI filtering: common-mode chokes (e.g., Coilcraft FA2672) and X/Y capacitors (0.1µF/275VAC X-type, 2.2nF/250VAC Y-type) must precede the bridge rectifier. Trace the +3.3V, +5V, and +12V rails–each should have dedicated secondary windings, followed by Schottky diodes (STMicroelectronics STPS20L45CT for +12V) and LC filters (100µH inductors with 2200µF/16V capacitors for +5V).
- Locate the PFC stage: identify the boost converter (e.g., Infineon IPA60R160P7 MOSFET and UC3843 controller) and confirm the 470µF/450V bulk capacitor placement.
- Verify OVP/UVP/OCP protections: the supervisory IC (TPS3700 or custom SMD arrays) should tie into feedback loops via optocouplers (PC817).
- Check standby power: a ViPer22A flyback controller with a 5W/5V standby transformer is standard–ensure isolation gaps (>6mm) between primary and secondary traces.
- Cross-reference with ATX v2.52 specifications: +3.3V and +5V rails must tolerate 20% ripple, +12V 120mV p-p–use an oscilloscope at 20MHz bandwidth for validation.
- Document proprietary tweaks: OEMs like Corsair modify feedback resistors (0.1% tolerance) to optimize transient response–compare against reference designs from PI Expert or Würth Elektronik REDexpert.
Measure AC input impedance (10Ω at 1kHz) and confirm the inrush current limiter (NTC thermistor like Amphenol SL22 120) before power cycling.
Key Components of a Power Supply Circuit and Their Symbols
Begin by identifying the primary transformer in the layout–its symbol resembles two parallel coils with magnetic coupling. Select a core with a turns ratio optimized for the required output voltage; deviations beyond ±5% from nominal input cause inefficiency. Check the datasheet for saturation limits to prevent core overheating, especially in high-load scenarios.
Next, examine the rectifier stage. Full-wave bridges (symbol: a diamond with four diodes) dominate modern designs due to superior ripple suppression. For low-cost alternatives, center-tapped configurations suffice but halve the output voltage per winding. Replace diodes with Schottky variants if transient response is critical–forward voltage drops as low as 0.2V improve efficiency in low-voltage rails.
Critical Passive Components
| Component | Symbol | Key Parameter | Failure Impact |
|---|---|---|---|
| Electrolytic capacitor | ⫸||⫷ | ESR < 0.1Ω | Ripple > 100mVpp |
| Inductor | ⌒⌒⌒ | Saturation > 1.5× rated current | Output sag > 15% |
| Resistor (bleeder) | ━━━ | Tolerance < 1% | Post-shutdown discharge > 2s |
Prioritize capacitors with ripple current ratings 30% above expected load. Use NP0/C0G ceramic types for feedback loops–X7R variants drift with temperature, skewing regulation. Place snubber networks (RC pair) across switching MOSFETs to quench voltage spikes; underestimating this leads to premature gate failure.
Switching regulators demand careful placement of the control IC. Locate the PWM controller (symbol: a rectangle with designated pins) within 10mm of the power switch to minimize trace inductance. Isolate the feedback path from noisy ground planes–route via inner layers if PCB space permits. For flyback topologies, add an auxiliary winding to power the IC; omitting this requires a separate linear regulator, increasing standby losses.
Protection and Auxiliary Elements
Fuses (symbol: ━▯━) should be sized to blow at 120% of maximum input current. Slow-blow types prevent nuisance tripping but delay response to faults. Install reverse polarity protection using a MOSFET or diode; the former incurs lower losses but adds driver complexity. Crowbar circuits (SCR + Zener) clamp output overvoltage–set the Zener 20% above nominal to avoid false triggers.
Thermal monitoring components (NTC thermistors) must be mounted adjacent to hotspots like the switching FET. Calibrate shutdown thresholds 10°C below the semiconductor’s maximum rating. Fans, if included, should activate at 50°C and reach full speed by 70°C–ball-bearing types last longer than sleeve-bearing but increase cost. EMI filters (common-mode choke + Y-cap) require differential placement near the input terminal; parasitic inductance here degrades attenuation.
Test each stage with a load resistor bank simulating 20%, 50%, and 80% of rated power. Observe voltage ripple on an oscilloscope with 10:1 probes to avoid loading effects. Replace default feedback resistors with 0.1% metal film types if tighter regulation (±2%) is needed. Document the startup sequence–ATX units power the +5VSB rail first; violating this order causes motherboard incompatibility.
For hold-up capacitors, calculate energy storage using E = 0.5 × C × V². Target 18–22ms of supply at minimum input voltage (e.g., 90VAC). Use polymers if space is constrained–aluminum electrolytics offer higher density but suffer from dry-out. Finally, label every component in the layout with reference designators matching the BOM; inconsistency here leads to debugging delays during certification.
Step-by-Step Tracing of High-Voltage AC to Low-Voltage DC Conversion
Begin by locating the mains input filter on the board–typically two Y-capacitors (470pF–2.2nF) connected between live/neutral and ground, paired with a common-mode choke. Measure the AC voltage post-filter; expect 220–240V (or 110–120V) RMS with less than 5% harmonic distortion. If readings exceed this, replace the choke or capacitors before proceeding–faulty filtering causes downstream regulator instability.
Trace the AC line to the primary rectifier bridge. A full-wave bridge (four diodes, 1N4007 or similar) converts AC to pulsating DC. Probe the output: nominal voltage should be ~310V (for 220V input) or ~155V (for 110V). If pulsations exceed 10V peak-to-peak, test diodes individually; a failed diode drops output by ~50% and introduces ripple measurable on an oscilloscope (target <200mVpp).
Next, follow the DC bus to the primary switching element–usually an N-channel MOSFET (e.g., STP12NM50 or equivalent). The gate driver IC (e.g., UC3843) generates PWM pulses (20–200kHz). Verify the MOSFET’s drain-source voltage: during on-cycle, it should near 0V; off-cycle aligns with the DC bus (~310V). A clamped voltage above 400V indicates a failing snubber circuit (resistor-capacitor network across MOSFET). Replace the snubber if waveforms show excessive ringing (>50V overshoot).
Examine the transformer primary winding: its inductance (typically 500µH–2mH) dictates current ramp slope. Use a DC resistance meter to confirm <1Ω; higher values suggest winding damage. On the secondary, expect multiple taps for +12V, +5V, and +3.3V outputs. Each tap connects to a fast-recovery diode (e.g., SB560) followed by LC filters (inductors: 1–10µH; capacitors: 1000–3300µF). Measure secondary voltages pre-regulation: +12V rail should read ~14–16V, +5V ~7–8V. If outside these ranges, swap diodes–reverse leakage current causes voltage sag.
End at the feedback loop. The optocoupler (e.g., PC817) isolates the primary controller from secondary voltages. Its LED side connects to a shunt regulator (TL431) monitoring a +5V or +3.3V rail. Adjust the trimmer resistor (often 10kΩ) in 1% increments to fine-tune output to ±2% of nominal. If regulation drifts, test the optocoupler’s CTR (current transfer ratio)–values below 50% require replacement. Log all measurements; baseline data accelerates future diagnostics.