ATX Power Supply Unit Circuit Design and Wiring Layout Guide

atx psu schematic diagram

Begin by locating the primary switching converter section–the core of any modern power unit. Look for a two-transistor forward converter configuration, typically utilizing N-channel MOSFETs (e.g., IRFBC40, STW20NK50Z) paired with a high-frequency transformer (often wound on an EE or EI core). The PWM controller–commonly a TL494, SG6105, or WT7510–will sit adjacent, connected via optocoupler feedback (e.g., PC817) for regulation. Verify the presence of a 12V standby circuit: a small flyback transformer feeding a 3.3V linear regulator (78L05 or equivalent) and a 5V auxiliary rail for the motherboard’s soft power logic.

Critically examine the input filtering stage. Expect a series of Y-capacitors (typically 1nF/2kV) bridging line and neutral to ground, complemented by X-capacitors (0.1µF–1µF) across the mains input. Common-mode chokes–ferrite cores wound with bifilar wire–should follow immediately after. Ensure varistors (MOV, e.g., 14D471K) and a thermistor (e.g., NTC 10D-9) are in place to suppress transients and limit inrush current. Check that fuse ratings (3A–5A slow-blow) match the unit’s maximum continuous load specification.

Map the secondary rectification and output rail generation. Identify Schottky diodes (e.g., SB560, MBR20100CT) handling 12V, 5V, and 3.3V outputs–each rail should include dedicated filtering capacitors (low-ESR electrolytics, typically 1000µF–2200µF/16V–25V) and an LC pi-filter (33µH–100µH inductor + 0.1µF ceramic). Trace the sense lines: the purple (+5VSB) and gray (PWR_OK) wires terminate at the motherboard connector, while the green (PS_ON#) wire allows software-controlled shutdown–confirm a 10kΩ pull-up resistor is present on this line to maintain logic high when inactive.

Isolate protection subcircuits. The overcurrent/overvoltage/undervoltage (OCP/OVP/UVP) monitoring is usually handled by discrete comparators (e.g., LM393) or shunt regulators (TL431). Look for series resistors (0.01Ω/5W–0.05Ω/10W) in the main rail paths–voltage drop across these triggers shutdown via the PWM controller. Thermal shutdown typically employs a 100kΩ NTC thermistor mounted near the switching transistors, wired to an auxiliary comparator. Verify fan control: most designs use a 2N3904 transistor driven by a 12V rail-derived PWM signal, with the tachometer output (yellow wire) feeding back pulse counts for RPM monitoring.

Understanding Computer Power Supply Circuit Layouts

atx psu schematic diagram

Begin by identifying key components in the circuit layout: the primary AC input, EMI filter, bridge rectifier, PFC (active or passive), and main switcher transformer. The EMI filter typically consists of common-mode chokes (e.g., VK200) and X/Y capacitors (e.g., 0.1μF X-class, 2.2nF Y-class) to suppress noise. Verify proper grounding between the filter and chassis–resistance should not exceed 0.1Ω. For active PFC circuits, check the boost converter stage (often driven by controllers like FAN7527 or NCP1653) and ensure the DC bus voltage stabilizes at 380–400V under full load.

  • Trace the +5VSB auxiliary supply path first–it remains active when the system is off. Look for a dedicated switching regulator (e.g., OB2269, TNY268) feeding a small high-frequency transformer (core size ≈ 10x6x4mm). Output diodes (schottky, e.g., SB560) must handle 1A continuous current; replace with SB5100 for 3A margin.
  • Monitor MOSFET gate drive signals (e.g., IRFBC30 for primary, IPD06N03LA for secondary). Rise/fall times should stay below 50ns; slower transitions indicate degraded gate resistors (replace 22Ω with 15Ω for faster response).
  • Inspect secondary rectification: center-tapped transformers use two diodes (e.g., MUR1620), while forward converters often employ synchronous rectifiers (e.g., IRLML6401). Ensure diodes have matching forward voltage drops (±20mV) to prevent current hogging.

Critical test points for troubleshooting:

  1. Verify AC input voltage at the bridge rectifier output–expect 300–325VDC for 230VAC input (±10% tolerance).
  2. Measure DC bus voltage after PFC–should stabilize within 5% of target under 20–100% load.
  3. Check +5VSB regulation–output must remain below 5.25V at no load and above 4.85V at 2A load.
  4. Confirm PWM controller (e.g., UC3843, SG6105) receives proper VCC (12–18V) and reference voltage (5V ±2%).

Replace electrolytic capacitors (e.g., Nippon Chemi-Con KZH/KZE series) after 30,000 hours; ESR should not exceed 0.2Ω for 1000μF units. For high-current rails (+12V, +5V), use parallel MLCCs (e.g., 22μF X7R 16V) to reduce ripple below 50mVpp.

Key Components in a Standard Power Unit Circuit

Begin by isolating the primary switching transformer–its core determines efficiency limits and noise margins. A ferrite ETD-49 or equivalent with a turns ratio of 3:1 (primary:secondary) ensures optimal energy transfer while minimizing hysteresis losses. Bypass capacitors should be placed within 10mm of the bridge rectifier to absorb high-frequency transients; ceramic X7R types rated for 50V or higher prevent premature failure under load spikes. For the PFC inductor, opt for a gapped core with a saturation current exceeding the maximum input by at least 20% to avoid nonlinear behavior.

Critical Secondary Elements

Post-regulation requires a synchronous rectifier MOSFET pair (e.g., ON Semiconductor NTD2955) for secondary outputs, replacing traditional diodes to reduce forward voltage drop to under 0.1V. The feedback loop must include a precision shunt regulator (TL431) paired with an optocoupler (PC817) for galvanic isolation; ensure the compensation network uses a 10kΩ resistor and 1nF capacitor to stabilize cross-over frequency around 1kHz. Output capacitors should combine low-ESR electrolytics (105°C rating) with polymer hybrids to balance ripple performance and longevity–never exceed 80% of their voltage rating in continuous operation.

Step-by-Step Trace of High Voltage Rectification and Filtering

atx psu schematic diagram

Begin by identifying the dual-diode bridge configuration at the input stage–typically four ultrafast recovery diodes (e.g., MUR1560G) arranged in a full-wave bridge. Verify each diode’s reverse breakdown voltage exceeds 600V to handle transient spikes. Probe the AC input terminals with a differential probe, ensuring the measured RMS voltage aligns with the nominal mains voltage (e.g., 230VAC ±10%). Any deviation beyond this range suggests a compromised EMI filter or faulty surge protector upstream.

Trace the rectified output to the first bulk capacitor–usually one or two high-value electrolytics (330µF–680µF, rated 400V–450VDC). Measure the ripple voltage across this capacitor with an oscilloscope set to AC coupling; acceptable ripple should not exceed 5V peak-to-peak at full load. If ripple exceeds this threshold, replace the capacitor or investigate parallel capacitance degradation (ESR rise often precedes failure). Check the temperature: a properly functioning capacitor should not exceed 60°C under normal operation.

Inspect the balancing resistors (if present) across series-connected capacitors–typically 100kΩ–470kΩ, 1W–2W. Their role is critical: mismatched resistor values or opens lead to uneven voltage division, risking overvoltage on a single capacitor. Confirm resistor values with a multimeter; drift above 5% mandates replacement. Additionally, ensure the PCB trace widths for these high-voltage paths meet at least 2.5mm clearance for 400VDC operation to prevent arcing.

Follow the DC bus to the active PFC circuit, if equipped. Locate the boost diode (e.g., STTH8S06D) and verify its forward voltage drop (typically 0.8V–1.2V) with a diode tester. The boost inductor should present a saturation current at least 20% above the maximum input current (calculate using P = VI, where P is the power rating). Probe the PFC output capacitor–often a film or high-temperature electrolytic (47µF–100µF, 450VDC)–for ripple under load; values above 1V peak-to-peak indicate insufficient capacitance or inductor core saturation.

Conclude by validating the bleed resistors–typically 1MΩ–2.2MΩ, 0.5W–across bulk capacitors. Their absence risks residual voltage retention, posing a shock hazard. Measure their resistance post-power-down; an open resistor necessitates immediate replacement. For safety, discharge capacitors manually using a 10kΩ–20kΩ power resistor (1W–2W) before handling, never rely on internal bleeds alone.

Voltage Regulation Stages: From +12V to +3.3V Lines

For stable low-voltage rails, implement a synchronous buck converter immediately after the +12V line. Use a switching regulator like the TPS53632 (TI) with a 300–500 kHz switching frequency–higher frequencies reduce inductor size but increase switching losses. Set the feedback network with precision resistors (0.1% tolerance) to achieve ±1% output accuracy on the +3.3V rail. Add a 22 µF ceramic capacitor (X5R/X7R) on both input and output to suppress transients.

Isolate switching noise with a pi-filter on the converter’s output: a 10 µH inductor followed by two 47 µF capacitors (one ceramic, one electrolytic). For transient response, adjust the compensation network using a Type III error amplifier–match the zero frequency to one-tenth of the switching frequency (e.g., 30–50 kHz). Below 3W loads, replace the buck converter with an LDO (e.g., LT3086) to eliminate switching interference, though this increases thermal dissipation–ensure a 10°C/W heatsink for 1A loads.

Monitor load steps with a dedicated current-sense amplifier (e.g., INA213). Configure it to trip at 120% of nominal load (3.96A for +3.3V/3A) and trigger a hiccup-mode protection via the enable pin of the buck regulator. Use Kelvin sensing for remote voltage regulation–route separate traces from the load back to the feedback divider to avoid IR drop errors.

Stage Component Critical Parameter Recommended Value
Input Filter Inductor Saturation Current ≥2× nominal (6A)
Feedback Network Resistors Tolerance 0.1%
Compensation Capacitor ESR ≤50 mΩ
Protection Current Limit Threshold 120% of max load

For EMI compliance, route high-current loops (

Validate regulation under dynamic loads by applying a 0.1A/µs transient between 10% and 90% of full load. Use an oscilloscope with a 100 MHz bandwidth to measure undershoot–it should not exceed 5% of the nominal voltage (165 mV for +3.3V). For redundant systems, add an ORing controller (e.g., LTC4412) to manage dual converters, ensuring seamless failover by setting the forward voltage drop to ≤20 mV.